The present invention relates to a heterojunction semiconductor device having a metamorphic buffer layer and a method of manufacturing, particularly to an improvement of thermal conductivity in the semiconductor device.
In recent years, the demand for a higher speed and a higher degree of integration of semiconductor devices has been becoming stronger. For example, the expectation for a heterojunction bipolar transistor (HBT) using a Group III-V compound semiconductor has been increasing.
An HBT is usually manufactured by a method in which, for example, a sub-collector layer, a collector layer, a base layer, an emitter layer and an emitter cap layer are sequentially epitaxially grown on a gallium-arsenic (GaAs) substrate or indium-phosphorus (InP) substrate by use of a molecular beam epitaxy process (MBE process), a metalloorganic chemical vapor deposition (MOCVD) process or the like, and the resulting laminate is processed further.
At present, materials capable of lattice matching with indium-phosphorus (InP) have a high electron mobility and a high saturated speed and, therefore, are expected as a material with which it is possible to manufacture a semiconductor device having further excellent high-frequency characteristics. However, an indium-phosphorus substrate is difficult to produce and is very expensive, so that most makers have not yet reached to the mass production of the indium-phosphorus substrate.
In view of the above, attention has been paid in recent years to a semiconductor device in which a material capable of lattice matching with indium-phosphorus is laminated on a gallium-arsenic substrate excellent in mechanical strength and capable of being produced comparatively inexpensively. In this case, a large difference in lattice constant, i.e., lattice mismatching exists between the gallium-arsenic crystal and the indium-phosphorus crystal; therefore, there is a need for a technology for growing a single crystal layer while alleviating such a lattice mismatching. The technology is called metamorphic technology, and a heterojunction bipolar transistor manufactured by use of the metamorphic technology is called metamorphic HBT (MHBT).
A buffer layer formed for alleviating the lattice mismatching by the metamorphic technology is called metamorphic buffer layer. The metamorphic buffer layer is a crystal layer of which a lattice constant gradually varies due, for example, to gradual variation in the composition of atoms constituting the crystal. By causing a gradual variation in the composition, the lattice constant can be varied while maintaining the growth of the single crystal.
The metamorphic buffer layer can be formed, for example, of a ternary mixed crystal InxGa1-xAs (0≦x≦1) composed of indium, gallium and arsenic. In the case where the proportion x of indium, i.e., the molar fraction x of indium based on the sum total of indium and gallium is small, the lattice constant of the ternary mixed crystal is substantially equal to the lattice constant of the gallium-arsenic crystal and, therefore, the ternary mixed crystal is in lattice matching with the gallium-arsenic substrate. On the other hand, where x is about 0.50, the lattice constant of the ternary mixed crystal is substantially equal to that of the indium-phosphorus crystal and, therefore, the ternary mixed crystal shows lattice matching with the indium-phosphorus material.
Therefore, when the metamorphic buffer layer composed of the ternary mixed crystal InxGa1-xAs is laminated on the gallium-arsenic substrate while gradually varying continuously or stepwise the proportion x of indium from x≈0 to x≈0.50, a lower layer of the metamorphic buffer layer can be formed in lattice matching with the gallium-arsenic substrate and, simultaneously, a chemical semiconductor layer composed of an indium-phosphorus material can be grown, with good crystallinity, on an upper layer of the metamorphic buffer layer. The metamorphic buffer layer composed of the ternary mixed crystal InxGa1-xAs is formed by a vapor phase growth method using an MBE (molecular beam epitaxy) apparatus or the like, and is formed as a continuous crystal, though a difference in lattice constant exists between the lower layer and the upper layer. Besides, strain is absorbed in the lower layer, and transfer of dislocations into the upper layer is prevented from occurring, whereby the crystal lattice in the upper layer can be orderly conditioned.
In the metamorphic technology at present, it has been reported that the dislocation density is the lowest in the case where an indium-gallium-arsenic ternary mixed crystal layer is formed as a metamorphic buffer layer to be formed on a gallium-arsenic substrate. Other than the indium-gallium-arsenic layer, examples of the metamorphic buffer layer to be formed on the gallium-arsenic substrate include ternary mixed crystal layers such as an indium-aluminum-arsenic (InAlAs) layer and binary crystal layers such as an indium-phosphorus (InP) layer.
In the case of forming a metamorphic buffer layer composed of an indium-phosphorus binary crystal layer, first, an indium-phosphorus layer to be a lowermost layer of the metamorphic buffer layer is formed directly on the gallium-arsenic substrate. Since there is a large difference in lattice constant between gallium-arsenic and indium-phosphorus, many faults and/or dislocations are generated in the indium-phosphorus layer. However, the dislocations and/or faults can be restricted into the lower layer of the buffer layer by conducting a treatment for relaxing the strains in the crystal, such as a thermal annealing treatment, in the course of further laminatingly forming a buffer layer composed of the indium-phosphorus layer on the lowermost layer. For example, the thermal annealing treatment may be carried out several times during the formation of the buffer layer, whereby the dislocations can be reduced gradually.
FIG. 7 is a sectional diagram showing the structure of a related-art metamorphic HBT 100 described in Applied Physics Letters, 77(6), 869 to 871 (Aug. 7, 2000). In this metamorphic HBT 100, a metamorphic buffer layer 102 is formed on a semi-insulating substrate 1, then a sub-collector layer 110, a collector layer 3, a base layer 4, an emitter layer 5 and an emitter cap layer 6 are laminated thereon in a mesa form, and a collector electrode 107, a base electrode 8 and an emitter electrode 9 are provided in contact with the sub-collector layer 110, the base layer 4 and the emitter cap layer 6, respectively.
For example, the metamorphic HBT 100 is an npn type HBT, in which a metamorphic buffer layer 102 composed of a ternary mixed crystal InxGa1-xAs is laminated on a semi-insulating substrate 1 composed of gallium-arsenic (GaAs). The proportion of indium in the buffer layer 102 is as low as x≈0 at the lowermost portion of a lower layer 102a in lattice matching with the gallium-arsenic substrate 1, is gradually increased continuously or stepwise as one goes from the lower layer 102a through an intermediate layer 102b to an upper layer 102c, and reaches a high value of x≈0.50 at an uppermost portion of the upper layer 102c in lattice matching with an indium-phosphorus material. The thickness of the buffer 102 is generally about 1 to 2 μm. Incidentally, the classification into the lower layer 102a, the intermediate layer 102b and the upper layer 102c used here is a classification of the buffer layer 102 into three regions on a functional and conceptual basis, based on the differences of the mating materials with which the regions can be in lattice matching. Therefore, the classification does not necessarily mean that these layers have clear boundaries therebetween (here and hereinafter).
The sub-collector layer 110 is an n+ type InGaAs layer having an impurity concentration of not less than 1×1019/cm3, and has a thickness of 300 to 500 nm. The collector layer 3 is an n− type InP layer having an impurity concentration of 1×1016/cm3, and the thickness thereof is 500 nm. The base layer 4 is a p+ type InGaAs layer having an impurity concentration of not less than 1×1019/cm3, and has a thickness of 75 nm. The emitter layer 5 is an n− type InP layer having an impurity concentration of 1×1017/cm3, and the thickness thereof is 125 nm. The emitter cap layer 6 is an n+ type InGaAs layer having an impurity concentration of not less than 1×1019/cm3, and has a thickness of 50 nm.
In the case of producing an HBT on a metamorphic buffer layer 102 as in the above-mentioned example, normally, in order to make electrical connection with the collector layer 3 and to smoothly guide a collector current to the collector electrode 107, a highly conductive sub-collector layer 110 is formed between the collector layer 3 and the metamorphic buffer layer 102, to thereby reduce the contact resistance and sheet resistance of the sub-collector layer 110. In this case, since an InGaAs layer is not only high in electron mobility but also capable of much reducing the ohmic resistance when in contact with metal, the InGaAs layer is often used as the sub-collector layer 110.
Meanwhile, in the case of using such a metamorphic HBT 100 as a power amplifier, the transistor may show a thermorunaway due to the heat generated by the device. In order to prevent the thermorunaway, it is desirable that the materials constituting the metamorphic HBT 100, particularly, the materials constituting the metamorphic buffer layer 102 and the sub-collector layer 110 which are located near the substrate 1 should be materials high in thermal conductivity. However, ternary mixed crystals often used as the metamorphic buffer layer 102 and the sub-collector layer 110 are low in thermal conductivity, as compared with binary crystals, and may therefore produce problems.
FIG. 8 is a graph showing the relationship between the proportion x of indium (the molar fraction of indium based on the sum total of indium and gallium) and thermal conductivity, of an indium-gallium-arsenic ternary system InxGa1-xAs at room temperature (300 K) (P. D. Maycock, Solid-State Electronics, vol. 10, Issue 3, 161 to 168 (1967)). It is seen from FIG. 8 that the thermal conductivity of the InxGa1-xAs system is high at the gallium-arsenic binary crystal where x=0 and at the indium-arsenic binary crystal where x=1 and that the thermal conductivities of other ternary mixed crystals are conspicuously lower than the thermal conductivities of these binary crystals. Particularly, the thermal conductivity of the InxGa1-xAr system is the lowest at the composition where x 0.50, which composition shows lattice matching with the indium-phosphorus material and is therefore preferable for use as the upper layer 102c of the metamorphic buffer layer 102 and the sub-collector layer 110.
A similar tendency is seen also for other ternary mixed crystals than the above, such as indium-aluminum-arsenic (InAlAs). In general, ternary mixed crystals represented by InGaAs and InAlAs are lower in thermal conductivity than binary crystals such as GaAs and InP. Moreover, the proportions x of In in the InGaAs layer and the InAlAs layer which show lattice matching with the indium-phosphorus material are as high as about 50%, which is the most disadvantageous from the viewpoint of thermal conductivity. Therefore, the use of a ternary mixed crystal such as InGaAs and InAlAs as a material for constituting a metamorphic HBT leads to a worsened heat release performance of the metamorphic HBT. When the heat release performance is worsened, thermal breakdown resistance (i.e., thermorunaway resistance) is largely degraded, whereby the output from the metamorphic HBT as a power device is limited. In addition, there may occur the problems that the operation of the device becomes instable due to variations in transistor characteristics with temperature variation and that it becomes necessary to introduce a ballast resistance to the emitter layer 5 for restraining the instable operation.
As has been above-mentioned, where a ternary mixed crystal layer of InGaAs or InAlAs is formed as a metamorphic buffer layer on a gallium-arsenic substrate, there is obtained the merit on one hand that the dislocation density is minimized. On the other hand, there is the demerit that the heat release performance of the metamorphic HBT is worsened, and device characteristics under high voltage are degraded largely. Therefore, in order to minimize the lowering in thermal conductivity, it may be necessary to reduce as much as possible the bulk or proportion of the ternary mixed crystal layer included in the metamorphic HBT.
In addition, in the case where a layer of InP which is a binary crystal having a comparatively good thermal conductivity is used for forming the metamorphic buffer layer, the heat release performance of the metamorphic buffer layer is enhanced, as compared with the case of using an InGaAs layer or an InAlAs layer. Even in this case, however, it is desirable to use the InGaAs layer which is not only high in electron mobility but also capable of being much lowered in ohmic resistance when in contact with metal, for forming the sub-collector layer 110, and it may therefore be necessary to reduce the lowering in thermal conductivity due to the sub-collector layer 110.